Freescale Semiconductor /MKL27Z4 /SIM /SOPT2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SOPT2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)RTCCLKOUTSEL 0CLKOUTSEL 0 (0)USBSRC 0 (00)FLEXIOSRC 0 (00)TPMSRC 0 (00)LPUART0SRC 0 (00)LPUART1SRC

USBSRC=0, TPMSRC=00, FLEXIOSRC=00, LPUART1SRC=00, RTCCLKOUTSEL=0, LPUART0SRC=00

Description

System Options Register 2

Fields

RTCCLKOUTSEL

RTC Clock Out Select

0 (0): RTC 1 Hz clock is output on the RTC_CLKOUT pin.

1 (1): OSCERCLK clock is output on the RTC_CLKOUT pin.

CLKOUTSEL

CLKOUT select

2 (010): Bus clock

3 (011): LPO clock (1 kHz)

4 (100): LIRC_CLK

6 (110): OSCERCLK

7 (111): IRC48M clock (IRC48M clock can be output to PAD only when chip VDD is 2.7-3.6 V)

USBSRC

USB clock source select

0 (0): External bypass clock (USB_CLKIN).

1 (1): IRC48M clock

FLEXIOSRC

FlexIO Module Clock Source Select

0 (00): Clock disabled

1 (01): IRC48M clock

2 (10): OSCERCLK clock

3 (11): MCGIRCLK clock

TPMSRC

TPM Clock Source Select

0 (00): Clock disabled

1 (01): IRC48M clock

2 (10): OSCERCLK clock

3 (11): MCGIRCLK clock

LPUART0SRC

LPUART0 Clock Source Select

0 (00): Clock disabled

1 (01): IRC48M clock

2 (10): OSCERCLK clock

3 (11): MCGIRCLK clock

LPUART1SRC

LPUART1 Clock Source Select

0 (00): Clock disabled

1 (01): IRC48M clock

2 (10): OSCERCLK clock

3 (11): MCGIRCLK clock

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